NAND type flash memory is widely employed as a semiconductor memory device for storing data in a nonvolatile manner. Due to the need for multi-functionality in electronic appliances in which such NAND type flash memory is installed, the NAND type flash memory itself requires to have its storage capacity increased, which in turn requires miniaturization of size and wiring pitch of storage elements.
A NAND type flash memory normally employs a memory transistor having a MOSFET structure of a stacked floating gate and control gate. A NAND cell unit in the NAND type flash memory is configured by a plurality of such memory transistors connected in series. One end of the NAND cell unit is connected to a bit line via a select gate transistor and the other end of the NAND cell unit is connected to a source line similarly via a select gate transistor.
To meet requirements for further miniaturization, for example, the so-called sidewall transfer process is employed in manufacture of the latest NAND type flash memory. In the sidewall transfer process, patterning of resist is performed with a minimum processing dimension F, and a slimming process is executed that further thins the patterned resist. Subsequently, the resist is used as a mask to process a hard mask, and a sidewall film is deposited on sidewalls of that hard mask. Then, an etching process is performed that allows the sidewall film to remain while removing the hard mask only. This remaining sidewall film is employed to perform etching of material film in layers below the sidewall film. This enables various kinds of wiring and so on to be formed with a width and pitch that are smaller than the minimum processing dimension F.
However, progress in miniaturization leads to interference effects on adjacent memory cells increasing, which in turn causes a write operation to be greatly affected.